Pipelined Processor on FPGA
Implemented a minimal pipelined processor architecture on FPGA, covering datapath construction, control logic, simulation, synthesis, and timing analysis.
Computer Engineer | Hardware | Systems
Building computing things from first principles.
Final-year Computer Engineering student at KICSIT, Institute of Space Technology, Islamabad. I work from transistors upward: HDL, FPGAs, firmware, circuits, and the systems around them.
Technical Skills
Featured Work
Implemented a minimal pipelined processor architecture on FPGA, covering datapath construction, control logic, simulation, synthesis, and timing analysis.
Final year project designing a PCB assembly machine with STM32 firmware, motion control, custom boards, and hardware-software co-design.
Following builders like Ben Eater to understand computing from the bottom up - from transistors to logic gates to processors.
Areas of Interest
FPGAs, RTL design, pipelined architectures, and the path toward custom silicon.
Firmware, real-time control, STM32, and making software talk to physical hardware.
Custom boards, circuit design, soldering, and hardware that actually works.
Transistors to logic gates to ALUs to processors. Understanding the stack from the bottom up.
Get in Touch
Open to IC design training, internships, collaborations, and technically serious conversations.